Hernán Ponce de León

July 2019 BMC for Weak Memory Models: Relation Analysis for Compact SMT Encodings Natalia Gavrilenko, Hernán Ponce de León, Florian Furbach, Keijo Heljanko and Roland Meyer In Computer Aided Verification (CAV) 2019., volume 11561 of LNCS, Springer, Cham. Details DOI BIB

2018 BMC with Memory Models as Modules Hernán Ponce de León, Florian Furbach, Keijo Heljanko and Roland Meyer In FMCAD, pages 1–9, IEEE. Details DOI BIB

2018 Compact and efficiently verifiable models for concurrent systems Hernán Ponce de León and Andrey Mokhov Formal Methods in System Design, 53():407–431, 2018. Details DOI BIB

2018 Incorporating negative information to process discovery of complex systems Hernán Ponce de León, Lucio Nardelli, Carmona Josep and Seppe K. L. M. vanden Broucke Inf. Sci., 422():480–496, 2018. Details DOI BIB

2017 Minimizing Test Suites with Unfoldings of Multithreaded Programs Olli Saarikivi, Hernán Ponce de León, Kari Kähkönen, Keijo Heljanko and Javier Esparza ACM Trans. Embedded Comput. Syst., 16(2):45:1–45:24, 2017. Details DOI BIB

2017 Portability Analysis for Weak Memory Models. PORTHOS: One Tool for all Models Hernán Ponce de León, Florian Furbach, Keijo Heljanko and Roland Meyer In SAS, volume 10422 of Lecture Notes in Computer Science, pages 299–320, Springer. Details URL DOI BIB

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Hernán Ponce de León

Publications