Hernán Ponce de León

Publikationen

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• Juli 2019 BMC for Weak Memory Models: Relation Analysis for Compact SMT Encodings Natalia Gavrilenko, Hernán Ponce de León, Florian Furbach, Keijo Heljanko und Roland Meyer In Computer Aided Verification (CAV) 2019., Band 11561 von LNCS, Springer, Cham. Details DOI BIB
• 2018 BMC with Memory Models as Modules Hernán Ponce de León, Florian Furbach, Keijo Heljanko und Roland Meyer In FMCAD, Seiten 1–9, IEEE. Details DOI BIB
• 2018 Compact and efficiently verifiable models for concurrent systems Hernán Ponce de León und Andrey Mokhov Formal Methods in System Design, 53():407–431, 2018. Details DOI BIB
• 2018 Incorporating negative information to process discovery of complex systems Hernán Ponce de León, Lucio Nardelli, Carmona Josep und Seppe K. L. M. vanden Broucke Inf. Sci., 422():480–496, 2018. Details DOI BIB
• 2017 Minimizing Test Suites with Unfoldings of Multithreaded Programs Olli Saarikivi, Hernán Ponce de León, Kari Kähkönen, Keijo Heljanko und Javier Esparza ACM Trans. Embedded Comput. Syst., 16(2):45:1–45:24, 2017. Details DOI BIB
• 2017 Portability Analysis for Weak Memory Models. PORTHOS: One Tool for all Models Hernán Ponce de León, Florian Furbach, Keijo Heljanko und Roland Meyer In SAS, Band 10422 von Lecture Notes in Computer Science, Seiten 299–320, Springer. Details URL DOI BIB